1. Field of the Invention
The present invention relates generally to an integrated circuit (IC) chip package, and more particularly to a low cost, high performance IC chip package with enhanced thermal capabilities.
2. Description of the Prior Art
The U.S. Pat. No. 5, 355,283 discloses a prior art thermally enhanced IC chip package, as shown in FIG. 1, which includes a substrate 1 with a central hole 2. The substrate 1 is bonded to a heat sink 3, which can be formed of copper or other materials having an acceptably high thermal conductivity, by an adhesive 4 such as an epoxy adhesive. An IC chip 5 is also bonded to the heat sink 3 by adhesive 4 within the central hole 2, which is subsequently filled with an encapsulant 6.
Such a conventional IC chip package as described above can provide good heat transfer away from the chip for the presence of the heat sink in the package, particularly since most of the heat sink surface is exposed the exterior of the package. However, it has some drawbacks. The differences in coefficients of thermal expansion between the heat sink 3 and the substrate 1 create stress in the adhesive layer 4. This is exaggerated by differences in heating and cooling rates. The heat sink 3 is heated directly by conduction through a relatively large area of an adhesive patch 7. The substrate 1 is heated less directly by conduction through the heat sink 3 and through the encapsulant 6. Thus, there are likely to be cyclical temperature differences that exaggerate differences in expansion due to differences in coefficient of thermal expansion. Moreover, the processes to implement an integral heat sink into the substrate are relatively complex and expensive.
It is therefore the primary objective of the present invention to provide a thermally enhanced IC chip free from the drawbacks of the prior art IC chip package.
It is another objective of the present invention to provide a thermally enhanced IC chip package which is cost-effective for not using chip attached epoxy adhesive layers and heat spreaders.
It is still another objective of the present invention to provide a thermally enhanced IC package having superior heat dissipation characteristics and good electrical performance.
In keeping with the principle of the present invention, the foregoing objectives of the present invention are attained by the thermally enhanced IC chip package comprising a substrate member having planar opposing top and bottom surfaces with conductive circuit patterns and an opening. A plurality of solder balls are electrically connected the bottom surface of said substrate member. An IC chip having an active side and an inactive side is received in the opening of the substrate in such a way that the active side of the chip and the top surface of the substrate face to a same direction. The active side of the chip is electrically connected with the top surface of the substrate. A thermally and electrically conductive adhesive layer is disposed on the inactive side of the chip and on the bottom surface of the substrate in a completely enclosing shape around the opening. A thermally and electrically conductive planar member having top and bottom surfaces is attached to the thermally and electrically conductive adhesive layer with the top surface thereof. A molding material encapsulates the chip, the opening and the top surface of the substrate.